CHAIN offers several significant advantages over conventional hierarchical synchronous bus structures. A few of these advantages are presented in the table below.
| Synchronous Bus | Silistix CHAIN | |
Ability to add pipeline latches to increase throughput
|
Possible at expense of all blocks having to cope with faster interconnect
|
Simple, since only faster blocks need to operate at the higher speed
|
Power consumption
|
Clock consumes power even when idle
|
Only consumes power when transferring data
|
Additional wiring cost
|
Large due to global clock distribution network
|
Lower due to shorter local wires in datapath and acknowledge
|
Flexibility to trade low-frequency parallel vs high-frequency serial operation
|
Difficult due to fixed clock frequency within a synchronous time domain
|
Automatic as every communication is self-timed
|
Timing closure cost
|
Much validation and many design iterations
|
Much less validation, far fewer iterations
|
| Radio Frequency Interference | High amplitude, frequency phased emissions | Low amplitude, spread across the spectrum. Not coupled to system clock frequency |